I noticed that there is a vi called initiate continous acquisition. What I would like to do, is to programmatically set the scope into averaging mode (pre-processing) and then read out the two channels after a given number of samples. In other words, I am averaging the signals by calling a set of single acquisitions. Right now I just use a while loop, which works, but is rather slow, because it initiates an acquisition for each sample. I need to average the signals in channel 1 and 2. I wonder if there is any advantage for one way or the other.ģ. I read that I could also implement it by using the initiate waveform and the acquisition status vi followed by a fetch waveform vi for each channel. I used read waveform to read ch 1 and fetch waveform right behind it to read ch2. I need to read two channels at the same time. It is not clear to me what the meaning is of those commands.Ģ. The read waveform and fetch waveform have a control named "size of waveform array" and another control called " waveform size". In the mean time I was able to implement what I wanted to do although it is a little slow.ġ. The first two pictures below show the simulation results running with minimal deadtime and the second with 400ns (i.e.Thanks for your reply. If you would like to learn about other converters we have implemented on the system, see the links below to our earlier posts.ĩ8% Efficient 14kW LLC Converter using HardwareStackĩ9% Efficient High Voltage Buck Converter using HardwareStackįollow on information - we now have some more data looking at the impact of deadtime on current harmonic distortion. More importantly, this is another great example of how #HardwareStack can be used to rapidly prototype new converters in the early stages of a project in order to reduce risk. It is really great to see it up and running.
We will post more on this converter as we progress in the lab.
Presently the power stage runs with relatively high dead-time in the switching legs and it is likely that this is creating non-linear behaviour around zero crossing of the current. We are now working to improve the current waveform as there is some clear distortion present, especially around the zero cross point.
#Wavesurfer 422 software
These parameters are normally buried in the software of the control algorithm but we find it very useful to be able to display them as waveforms on a scope in real time for debug purposes using the advanced features of our HardwareStack platform. The plot below shows the PLL value (Green), the sector information for our space vector modulator (Blue) and the Vd Value (Red) used in the control scheme. Whilst this PLL value is an internal control variable, we are able to view it directly on a our 'scope by feeding it out via on of the three precision DAC's we have implemented on our control board. The output of the PLL is a value from zero to 2*pi representing how far through the mains cycle we are at any point in time. The DQ control scheme uses a PLL implemented in the digital controller on our HardwareStack control board.
No bridge rectifier is used on the front end of the AFE power stage and in terms of power flow, it is natively bi-directional.If you are more used to the world of single phase PFC then the three phase active front end is rather different:. From a utility perspective, the benefits of an AFE are the same as a single phase power factor correction (PFC) system in that excellent power factor can be achieved. This high voltage DC link is then used to drive another downstream converter or maybe an inverter for a motor. If you've not come across an AFE before, essentially it is a three phase power factor corrector which operates directly on the three phase supply to generate a high voltage DC link. Jon has now achieved 12.5kW from his HardwareStack based active front end (AFE).
This afternoon has been an exciting (and hot) one in the lab at Converter Technology.
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